PROTECTION OF UNDER-LAYER CONDUCTIVE PATHWAY
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United States of America Patent
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Issued Date -
Jan 30, 2014
app pub date -
Jul 24, 2012
filing date -
Jul 24, 2012
priority date (Note) -
Abandoned
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Abstract
Systems and methods are presented for preventing removal of material comprising a metal gate during removal of a mask layer in a semiconductor structure. Upon exposure of the metal line during formation of a via opening the exposed portion of the metal line undergoes chemical modification to form a passivation layer. The passivation layer is subsequently covered by an etch selectivity layer, wherein the etch selectivity layer prevents removal of at least one of a portion of the metal line or the passivation layer during removal of a hard mask layer comprising the semiconductor structure. In an alternate approach, the metal line is formed with a capping layer which, following exposure by a via opening formed in the semiconductor structure, is chemically modified to form a layer having etch selectivity to acts as a protective layer during removal of a hard mask layer comprising the semiconductor layer.
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