DRAM STRUCTURE WITH BURIED WORD LINES AND FABRICATION THEREOF, AND IC STRUCTURE AND FABRICATION THEREOF
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United States of America Patent
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app pub date -
Oct 7, 2013
filing date -
May 17, 2011
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Abandoned
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Abstract
A DRAM structure with buried word lines is described, including a semiconductor substrate, cell word lines buried in the substrate and separated from the same by a first gate dielectric layer, and isolation word lines buried in the substrate and separated from the same by a second gate dielectric layer. The top surfaces of the cell word lines and those of the isolation word lines are lower than the top surface of the substrate. The bottom surfaces of the isolation word lines are lower than those of the cell word lines.
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