Process variation tolerant bank collision detection circuit
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United States of America Patent
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Jul 8, 2014
Grant Date -
Mar 20, 2014
app pub date -
Sep 14, 2012
filing date -
Sep 14, 2012
priority date (Note) -
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Abstract
A process variation tolerant collision detection apparatus for use in detecting collisions in a multibank memory. The apparatus may receive a plurality of memory commands for execution at the multibank memory. The plurality of memory commands may be compared by an index address comparator and a bank address comparator to generate an index match signal and a bank match signal. The index match signal and the bank match signal may be analyzed by a timing correction module such that errors associated with process variation of the signals used in the system may be eliminated. Accordingly, a corrected index match signal and a corrected bank match signal may be provided to a collision detection circuit to determine whether a collision exits.
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