SEMICONDUCTOR STORAGE DEVICE

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United States of America Patent

APP PUB NO 20140085964A1
SERIAL NO

14028942

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Abstract

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A control circuit controls memory operations such that, in a first rewriting operation in which a resistance state of a variable resistance element is changed from a first state to a second state, a first voltage pulse is applied to both terminals of a memory cell while limiting the amount of current flowing through the variable resistance element to a value smaller than or equal to a certain small amount of current, in a second rewriting operation in which the resistance state of the variable resistance element is changed from the second state to the first state, a second voltage pulse is applied to both terminals of the memory cell, and, in a reading operation in which the resistance state stored in the variable resistance element is read, a third voltage pulse is applied to both terminals of the memory cell.

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Patent Owner(s)

Patent OwnerAddress
SHARP KABUSHIKI KAISHA1 TAKUMI-CHO SAKAI-KU SAKAI CITY OSAKA
ELPIDA MEMORY INC2-1 YAESU 2-CHOME CHUO-KU TOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
MAE, Kenji Tokyo, JP 15 70
NAKANO, Takashi Osaka, JP 349 3066
TAMAI, Yukiko Osaka, JP 1 3

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