Semiconductor device and method of forming supporting layer over semiconductor die in thin fan-out wafer level chip scale package
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United States of America Patent
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Jul 5, 2016
Grant Date -
Apr 3, 2014
app pub date -
Sep 28, 2012
filing date -
Sep 28, 2012
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Abstract
A semiconductor device includes a semiconductor die. An encapsulant is formed around the semiconductor die. A build-up interconnect structure is formed over a first surface of the semiconductor die and encapsulant. A first supporting layer is formed over a second surface of the semiconductor die as a supporting substrate or silicon wafer disposed opposite the build-up interconnect structure. A second supporting layer is formed over the first supporting layer an includes a fiber enhanced polymer composite material comprising a footprint including an area greater than or equal to an area of a footprint of the semiconductor die. The semiconductor die comprises a thickness less than 450 micrometers (μm). The thickness of the semiconductor die is at least 1 μm less than a difference between a total thickness of the semiconductor device and a thickness of the build-up interconnect structure and the second supporting layer.
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