Forming barrier walls, capping, or alloys /compounds within metal lines

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United States of America Patent

PATENT NO 9659869
SERIAL NO

13630724

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Abstract

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Described herein are techniques structures related to forming barrier walls, capping, or alloys/compounds such as treating copper so that an alloy or compound is formed, to reduce electromigration (EM) and strengthen metal reliability which degrades as the length of the lines increases in integrated circuits.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Clarke, James S Portland, US 136 2670
Gstrein, Florian Portland, US 82 981
Indukuri, Tejaswi K Hillsboro, US 26 291
Jezewski, Christopher J Hillsboro, US 67 398
Meyers, Alan M Beaverton, US 2 20
Singh, Kanwal Jit Hillsboro, US 26 311

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