Jitter tolerant receiver
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United States of America Patent
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Mar 17, 2015
Grant Date -
Apr 3, 2014
app pub date -
Sep 30, 2012
filing date -
Sep 30, 2012
priority date (Note) -
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Abstract
An embodiment of the invention includes a receiver with reduced error terms and incoming jitter tracking that improves jitter tolerance. An embodiment provides these benefits based on a voltage integrator that recovers data and clock information from incoming signals without use of a PLL, PI, CDR, and the like. An embodiment provides these benefits based on a time integrator that recovers, using digital logic, data and clock information from incoming signals without use of a PLL, PI, CDR, and the like. Other embodiments are described herein.
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