Instruction set for message scheduling of SHA256 algorithm

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United States of America Patent

PATENT NO 8838997
APP PUB NO 20140093069A1
SERIAL NO

13631165

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A processor includes a first execution unit to receive and execute a first instruction to process a first part of secure hash algorithm 256 (SHA256) message scheduling operations, the first instruction having a first operand associated with a first storage location to store a first set of message inputs and a second operand associated with a second storage location to store a second set of message inputs. The processor further includes a second execution unit to receive and execute a second instruction to process a second part of the SHA256 message scheduling operations, the second instruction having a third operand associated with a third storage location to store an intermediate result of the first part and a third set of message inputs and a fourth operand associated with a fourth storage location to store a fourth set of message inputs.

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Patent Owner(s)

  • INTEL CORPORATION

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gopal, Vinodh Westborough, US 366 2586
Guilford, James D Northborough, US 152 1287
Gulley, Sean M Boston, US 49 500
Wolrich, Gilbert M Framingham, US 178 1942
Yap, Kirk S Framingham, US 110 926

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