Packaged semiconductor assemblies and methods for manufacturing such assemblies
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United States of America Patent
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Mar 6, 2018
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N/A
app pub date -
Jan 10, 2014
filing date -
Jul 9, 2007
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Abstract
Packaged semiconductor assemblies including interconnect structures and methods for forming such interconnect structures are disclosed herein. One embodiment of a packaged semiconductor assembly includes a support member having a first bond-site and a die carried by the support member having a second bond-site. An interconnect structure is connected between the first and second bond-sites and includes a wire that is coupled to at least one of the first and second bond-sites. The interconnect structure also includes a third bond-site coupled to the wire between the first and second bond-sites.
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