Wireless telephone sending speech data in second packet secondary stage
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Oct 6, 2015
Grant Date -
May 15, 2014
app pub date -
Jan 21, 2014
filing date -
Dec 14, 1999
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An IC processor circuit has an interface for a microphone and a packet switched network. A memory holds bits for converting audible speech from the microphone into digital data in each of successive frames. For each frame the converting includes forming LPC data, LTP lag data, parity check data, adaptive and fixed codebook gain data, and fixed codebook pulse data. The digital data representing the audible speech for the frames is placed into sequential packets, with each packet having a primary stage and a secondary stage. The placing includes arranging data from a first frame of speech in the primary stage of a first packet and arranging data from the first frame of speech in the secondary stage of a second packet, which follows the first packet. The data in the secondary stage includes only LPC data, LTP lag data, parity check data, and adaptive and fixed codebook gain data.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully