CHIP PACKAGE AND A METHOD FOR MANUFACTURING A CHIP PACKAGE
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Jun 5, 2014
app pub date -
Dec 4, 2012
filing date -
Dec 4, 2012
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A chip package may include an interconnection layer having a first surface configured to face at least one chip, and a second surface opposite the first surface; at least one first pad and at least one second pad formed at at least one of the first surface and the second surface of the interconnection layer; at least one first conductive interconnect formed over the at least one first pad; and at least one second conductive interconnect formed over the at least one second pad, wherein a height of the at least one first conductive interconnect is less than a height of the at least one second conductive interconnect.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully