Gate fringing effect based channel formation for semiconductor device

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United States of America Patent

PATENT NO 9570458
SERIAL NO

14179316

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Abstract

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Methods and structures for forming semiconductor channels based on gate fringing effect are disclosed. In one embodiment, a NAND flash memory device comprises multiple NAND strings of memory transistors. Each memory transistor includes a charge trapping layer and a gate electrode formed on the charge trapping layer. The memory transistors are formed close to each other to form a channel between an adjacent pair of the memory transistors based on a gate fringing effect associated with the adjacent pair of the memory transistors.

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Patent Owner(s)

  • CYPRESS SEMICONDUCTOR CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chung, Sung-Yong Davis, US 19 76
Lin, Ya-Fen Saratoga, US 23 198
Suh, Youseok Cupertino, US 48 181
Wu, Yi-Ching Jean San Jose, US 8 22

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