Semiconductor device and method of forming low profile fan-out package with vertical interconnection units

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United States of America Patent

PATENT NO 9704780
SERIAL NO

14038575

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Abstract

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A semiconductor device includes a semiconductor die. A first interconnect structure is disposed over a peripheral region of the semiconductor die. A semiconductor component is disposed over the semiconductor die. The semiconductor component includes a second interconnect structure. The semiconductor component is disposed over the semiconductor die to align the second interconnect structure with the first interconnect structure. The first interconnect structure includes a plurality of interconnection units disposed around first and second adjacent sides of the semiconductor die to form an L-shape border of the interconnection units around the semiconductor die. A third interconnect structure is formed over the semiconductor die perpendicular to the first interconnect structure. An insulating layer is formed over the semiconductor die and first interconnect structure. A plurality of vias is formed through the insulating layer and into the first interconnect structure with the second interconnect structure disposed within the vias.

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Patent Owner(s)

  • STATS CHIPPAC PTE. LTE.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Choi, Won Kyoung Singapore, SG 68 877
Lin, Yaojian Singapore, SG 330 9795
Marimuthu, Pandi C Singapore, SG 66 1470
Shim, Il Kwon Singapore, SG 235 6843

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