Importance

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Abstract

A scalable high throughput video encoder is described herein. A plurality of dedicated, hardware video encoders runs in a staggered, parallel architecture, where each video encoder encodes a video frame and the stagger or delay is a programmable number of macroblock rows. In an example method, after a first video encoder finishes encoding the first x macroblock rows of a frame, the first video encoder signals a second video encoder to start encoding a macroblock row of a next unprocessed frame. Both video encoders continue encoding in parallel in a synchronized, staggered manner. At the end of the frame, the first video encoder starts encoding x macroblock rows of another unprocessed frame.

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First Claim