SYSTEM AND METHOD FOR DETERMINATION OF LATENCY TOLERANCE
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United States of America Patent
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Issued Date -
Jun 26, 2014
app pub date -
Dec 24, 2012
filing date -
Dec 24, 2012
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Abandoned
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Abstract
Particular embodiments described herein can offer a method that includes receiving first link state information associated with a first device, determining, by a processor, an upward latency tolerance based, at least in part, on the first link state information, and providing the upward latency tolerance to a power management controller.
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