Hybrid latch and fuse scheme for memory repair

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United States of America Patent

PATENT NO 8995217
APP PUB NO 20140185398A1
SERIAL NO

13783729

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Abstract

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A method and apparatus for managing memory in an electronic system is described. The method includes determining a failure in an element of the memory array that is repairable by a redundant element. The method may further include using a latch to identify the redundant element. The method may also include that upon an event, using a value in the latch in an eFuse which subsequently selects the redundant element.

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Patent Owner(s)

  • GLOBALFOUNDRIES INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Franceschini, Michele M White Plains, US 97 1773
Hunter, Hillery C Deerfield, US 81 913
Kilmer, Charles A Essex Junction, US 52 768
Kim, Kyu-hyoun Mount Kisco, US 203 2483
Lastras-Montano, Luis A Cortlandt Manor, US 163 3431

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