On chip electrostatic discharge (ESD) event monitoring

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United States of America Patent

PATENT NO 9673116
SERIAL NO

13733954

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Abstract

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An approach for monitoring electrostatic discharge (ESD) event of an integrated circuit. The approach includes a canary device for exhibiting an impedance shift when affected by an ESD pulse, wherein circuit drain of the canary device is connected to an input terminal of the circuit structure. The approach further includes circuit source and logic gates of the canary device, connected to a circuit drain of ESD transistor of the circuit structure, wherein circuit source of the ESD transistor is connected to an output terminal of the circuit structure. The approach further includes a logic gate of the ESD transistor, connected to an enable signal of the circuit structure, and wherein the enable signal is connected to the output terminal through a capacitor of the circuit structure. In addition, the enable signal is also connected to the input terminal through a resistor of the circuit structure.

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Patent Owner(s)

  • INTERNATIONAL BUSINESS MACHINES CORPORATION

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
DeForge, John B Barre, US 17 52
Li, Junjun Williston, US 153 1556
Loiseau, Alain F Williston, US 31 22
Peterson, Kirk D Jericho, US 152 1143

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