Overlap capacitance nanowire
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United States of America Patent
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Aug 12, 2014
Grant Date -
Jul 17, 2014
app pub date -
Jan 11, 2013
filing date -
Jan 11, 2013
priority date (Note) -
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Abstract
A device and method for fabricating a nanowire include patterning a first set of structures on a substrate. A dummy structure is formed over portions of the substrate and the first set of structures. Exposed portions of the substrate are etched to provide an unetched raised portion. First spacers are formed about a periphery of the dummy structure and the unetched raised portion. The substrate is etched to form controlled undercut etched portions around a portion of the substrate below the dummy structure. Second spacers are formed in the controlled undercut etched portions. Source/drain regions are formed with interlayer dielectic regions formed thereon. The dummy structure is removed. The substrate is etched to release the first set of structures. Gate structures are formed including a top gate formed above the first set of structures and a bottom gate formed below the first set of structures to provide a nanowire.
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