Placement of storage cells on an integrated circuit
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
May 26, 2015
Grant Date -
Jul 17, 2014
app pub date -
Jan 15, 2013
filing date -
Jan 15, 2013
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A method for configuring the placement of a plurality of storage cells on an integrated circuit includes grouping the plurality of storage cells into a plurality of words, where each of the plurality of words is protected by an error control mechanism. The method also includes placing each of the storage cells on the integrated circuit such that a distance between any two of the storage cells belonging to one of the plurality of words is greater than a minimum distance. The minimum distance is configured such that a probability of any of the plurality of words experiencing multiple radiation induced errors is below a threshold value.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully