Integration of laminate MEMS in BBUL coreless package

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 9708178
APP PUB NO 20140203379A1
SERIAL NO

13995924

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ATTORNEY / AGENT: (SPONSORED)

Importance

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Abstract

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An apparatus including a die including a first side and an opposite second side including a device side with contact points and lateral sidewalls defining a thickness of the die; a build-up carrier coupled to the second side of the die, the build-up carrier including a plurality of alternating layers of conductive material and insulating material, wherein at least one of the layers of conductive material is coupled to one of the contact points of the die; and at least one device within the build-up carrier disposed in an area void of a layer of patterned conductive material. A method and an apparatus including a computing device including a package including a microprocessor are also disclosed.

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Patent Owner(s)

  • INTEL CORPORATION

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Sankman, Robert L Phoenix, US 165 1595
Teh, Weng Hong Phoenix, US 48 659

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