METHOD FOR FABRICATING SOLDER COLUMNS FOR A COLUMN GRID ARRAY PACKAGE
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United States of America Patent
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app pub date -
Mar 25, 2014
filing date -
Jul 12, 2012
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A method for fabricating an electronic device package having a column grid array is disclosed. A column grid array package includes a substrate, an integrated circuit located on a first side of the substrate, and a set of solder columns located on a second side of the substrate. The column grid array package also includes multiple two-tab electronic devices located on the second side of the substrate. The heights of the two-tab electronic devices are substantially identical to the heights of the solder columns.
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