Manufacturing of FET Devices Having Lightly Doped Drain and Source Regions

Number of patents in Portfolio can not be more than 2000

United States of America Patent

SERIAL NO

13756134

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

Embodiments described herein generally relate to methods of manufacturing n-type lightly doped drains and p-type lightly doped drains. In one method, a photoresist mask is used to etch a transistor, and the mask is left in place (i.e., reused) to protect other devices and poly while a high energy implantation is performed in alignment with the photoresist mask, such that the implantation is adjacent to the etched transistor. One example of a high energy implantation is forming lightly doped source and drain regions. This technique of reusing a photoresist mask can be employed for creating lightly doped source and drain regions of one conductivity followed by using the technique a second time to create lightly doped source and drain regions of the complementary conductivity type. This may prevent use of at least one hard mask during manufacturing.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
CYPRESS SEMICONDUCTOR CORPORATION198 CHAMPION COURT SAN JOSE CA 95134-1709

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
FANG, Shenqing Fremont, US 127 886
Kim, Unsoon San Jose, US 59 516

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation