Semiconductor memory device

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 9093144
APP PUB NO 20140211539A1
SERIAL NO

14026258

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Abstract

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A control circuit is configured to perform, when a plurality of variable resistance elements connected to a selected first wiring line are selected, a read operation to sense a voltage of the selected first wiring line. The control circuit is configured to adjust, according to the voltage of the selected first wiring line sensed in the read operation, a voltage to be applied to the selected first wiring line in a reset operation or a set operation. The reset operation is an operation to increase resistance of a variable resistance element. The set operation is an operation to decrease resistance of a variable resistance element.

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Patent Owner(s)

  • TOSHIBA MEMORY CORPORATION

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kanno, Hiroshi Yokkaichi, JP 310 4377
Minemura, Yoichi Yokkaichi, JP 44 206
Tsukamoto, Takayuki Yokkaichi, JP 118 1058

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