Process for producing a semiconductor chip

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United States of America Patent

PATENT NO 9266330
APP PUB NO 20140212998A1
SERIAL NO

14152272

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Abstract

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A process for producing a semiconductor chip having a substrate and a bump formed on the substrate including (1) forming, on a substrate, a conductor gold for plating to be a base of plating growth; (2) forming a mask for plating on the conductor gold for plating; (3) performing plating using the mask for plating to form the bump and a dummy pattern; (4) removing the mask for plating; (5) etching the conductor gold for plating; and (6) applying a shock to at least the dummy pattern. The amount of side etching of the conductor gold for plating is grasped from a state of separation of the dummy pattern due to the shock in the step (6).

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Patent Owner(s)

  • CANON KABUSHIKI KAISHA

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chida, Mitsuru Yokohama, JP 28 103
Fujii, Kenji Yokohama, JP 238 1497
Kurosu, Toshiaki Oita, JP 24 69
Manabe, Takanobu Kawasaki, JP 21 36
Nagai, Masataka Yokohama, JP 22 33
Watanabe, Makoto Yokohama, JP 376 3281

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