In-kernel SRCU implementation with reduced OS jitter
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United States of America Patent
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Dec 30, 2014
Grant Date -
Aug 7, 2014
app pub date -
Feb 4, 2013
filing date -
Feb 4, 2013
priority date (Note) -
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Abstract
A technique for implementing SRCU with reduced OS jitter may include: (1) providing a pair of critical section counters for each CPU; (2) when entering an SRCU read-side critical section, incrementing one of the critical section counters associated with a first grace period; (3) when exiting an SRCU read-side critical section, decrementing one of the critical section counters associated with the first grace period; (4) when performing a data update, initiating the second grace period and performing a counter summation operation that sums the critical section counters associated with the first grace period to generate a critical section counter sum; (5) storing a snapshot value for each critical section counter during the summing; and (6) if the critical section counter sum indicates there are no active SRCU read-side critical sections for the first grace period, rechecking by comparing the snapshot values to current values of the critical section counters.
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