Pseudo-inverter circuit with multiple independent gate transistors

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United States of America Patent

PATENT NO 9496877
APP PUB NO 20140225648A1
SERIAL NO

14346270

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Abstract

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The invention relates to a circuit including a transistor of a first type of channel in series with a transistor of a second type of channel between first and second terminals for applying a power supply potential, each of the transistors being a multiple gate transistor having at least a first (G1P, G1N) and a second (G2P, G2N) independent control gates, characterized in that at least one of the transistors is configured for operating in a depletion mode under the action of a second gate signal applied to its second control gate (G2p, G2N).

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Patent Owner(s)

  • SOITEC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ferrant, Richard Esquibien, FR 87 1846
Mazure, Carlos Bernin, FR 63 1058
Nguyen, Bich-Yen Austin, US 149 4416

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