DEVICE

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United States of America Patent

SERIAL NO

14256051

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Abstract

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Provided is a device, including: a first terminal which receives an external clock signal; a clock generation circuit connected to the first terminal to generate an internal clock signal based on the external clock signal; word lines and bit lines; amplifier circuits connected to the bit lines, respectively; and a control unit. The control unit controls, in a test operation, at least one of the word lines to repeat a selected state and an unselected state in accordance with the internal clock signal during a first period, and maintains the amplifier circuits in an active state during the first period. The control unit further controls, in a normal operation, the amplifier circuits to switch between the active state and an inactive state depending on switching between the selected state and the unselected state of the at least one of the word lines.

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Patent Owner(s)

Patent OwnerAddress
ELPIDA MEMORY INC2-1 YAESU 2-CHOME CHUO-KU TOKYO

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
AKAMATSU, Hiroshi Tokyo, JP 66 699
Kaneko, Shoji Tokyo, JP 23 117

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