Method and apparatus for clock and data recovery

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United States of America Patent

PATENT NO 9032274
APP PUB NO 20140229785A1
SERIAL NO

13898806

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Abstract

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A multi-link input/output (I/O) interface uses both feed-forward and feedback signaling to reduce the impact of noise on data capture at a memory controller. To transfer data from a source module to a destination module, a defined pattern is communicated from the memory module along a master channel concurrent with the memory module providing data via one or more slave channels. Based on the phase of the defined pattern as it is received, the multi-link I/O interface feeds forward to the slave channels control signaling whose phase reflects a predicted noise pattern for the system. Each slave channel performs CDR by adjusting timing of its corresponding capture clock signal based on the fed forward control signaling and based on feedback signaling for the corresponding slave channel, whereby the feedback signaling reflects an error measurement between a phase of a capture clock signal and transitions in received data.

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Patent Owner(s)

Patent OwnerAddress
ADVANCED MICRO DEVICES INCONE AMD PLACE SUNNYVALE CA 94088-3453

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Barakat, Shadi M Foster City, US 7 68
Lamarche, Paul-Hugo San Jose, US 4 38
Nair, Bhuvanachandran K Fremont, US 4 23

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