METHOD OF FORMING A DRAM ARRAY OF DEVICES WITH VERTICALLY INTEGRATED RECESSED ACCESS DEVICE AND DIGITLINE

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United States of America Patent

SERIAL NO

14265928

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Abstract

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A method is disclosed for forming a memory device having buried access lines (e.g., wordlines) and buried data/sense lines (e.g., digitlines) disposed below vertical cell contacts. The buried wordlines may be formed trenches in a substrate extending in a first direction, and the buried digitlines may be formed from trenches in a substrate extending in a second direction perpendicular to the first direction. The buried digitlines may be coupled to a silicon sidewall by a digitline contact disposed between the digitlines and the silicon substrate.

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Patent Owner(s)

Patent OwnerAddress
U S BANK NATIONAL ASSOCIATION AS COLLATERAL AGENT100 WALL STREET SUITE 1600 NEW YORK NY 10005

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hwang, David Boise, US 53 438
Jozwiak, Jim Boise, US 2 57
Parekh, Kunal Boise, US 38 806
Roberts, Ceredig Boise, US 41 978
Tran, Thy Boise, US 6 71

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