TEST CONTROL USING EXISTING IC CHIP PINS
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Aug 21, 2014
app pub date -
Feb 20, 2014
filing date -
Feb 20, 2013
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
An apparatus and method are provided for testing normal circuitry in an integrated circuit, the method including writing test protocols into a plurality of test registers using an enable pin and a switch pin in a first mode, storing a logic high signal in one of the plurality of test registers once the writing is completed, switching from the first mode to a second mode if the one of the plurality of test registers stores the logic high signal, and testing the normal circuitry using the enable pin and the switch pin in the second mode.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully