BUFFER CIRCUIT
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United States of America Patent
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Aug 26, 2014
Grant Date -
Aug 28, 2014
app pub date -
Aug 6, 2013
filing date -
Feb 28, 2013
priority date (Note) -
Granted
status (Latency Note)
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Abstract
A buffer circuit includes a first current mirror circuit, a second current mirror circuit, a first transistor, and a second transistor. The first current mirror circuit passes a first mirror current through a second node, corresponding to a first current passed through a first node, and is activated based on a first activating signal. The second current mirror circuit is connected to the first node and the second node, passes a second mirror current through the second node, corresponding to a second current passed through the first node, and is activated based on a second activating signal. The first transistor has a gate to which a reference voltage is applied and has a drain connected to the first node. The second transistor has a gate to which an input voltage is applied and has a drain connected to the second node.
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