Smart read scheme for memory array sensing

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United States of America Patent

PATENT NO 8885428
SERIAL NO

13773963

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Abstract

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Methods for reducing variability in bias voltages applied to a plurality of memory cells during a sensing operation caused by IR drops along a word line shared by the plurality of memory cells are described. In some embodiments, IR drops along a shared word line may be reduced by reducing sensing currents associated with memory cells whose state has already been determined during a sensing operation. In one example, once a sense amplifier detects that a memory cell being sensed is in a particular state, then the sense amplifier may disable sensing of the memory cell and discharge a corresponding bit line associated with the memory cell. In some cases, a bit line voltage associated with a memory cell whose state has not already been determined during a first phase of a sensing operation may be increased during a second phase of the sensing operation.

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Patent Owner(s)

  • SANDISK TECHNOLOGIES LLC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Yingchang Cupertino, US 24 236
Lee, Jeffrey Koon Yee Fremont, US 7 119

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