Compact low-power fully digital CMOS clock generation apparatus for high-speed SerDes
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Apr 7, 2015
Issued Date -
N/A
app pub date -
Jul 19, 2013
filing date -
Feb 28, 2013
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A device for high-speed clock generation may include an injection locking-ring oscillator (ILRO) configured to receive one or more input clock signals and to generate multiple clock signals with different equally spaced phase angles. A phase-interpolator (PI) circuit may be configured to receive the multiple coarse spaced clock signals and to generate an output clock signal having a correct phase angle. The PI circuit may include a smoothing block that may be configured to smooth the multiple clock signals with different phase angles and to generate multiple smooth clock signals. A pulling block may be configured to pull edges of the multiple smooth clock signals closer to one another.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully