Method and structure for dielectric isolation in a fin field effect transistor
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
May 19, 2015
Grant Date -
Sep 18, 2014
app pub date -
Mar 12, 2013
filing date -
Mar 12, 2013
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A finFET and method of fabrication are disclosed. A sacrificial layer is formed on a bulk semiconductor substrate. A top semiconductor layer (such as silicon) is disposed on the sacrificial layer. The bulk semiconductor substrate is recessed in the area adjacent to the transistor gate and a stressor layer is formed in the recessed area. The sacrificial layer is selectively removed and replaced with an insulator, such as a flowable oxide. The insulator provides isolation between the transistor channel and the bulk substrate without the use of dopants.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully