Apparatus and methods relating to a memory cell having a floating body

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United States of America Patent

PATENT NO 9048131
APP PUB NO 20140269047A1
SERIAL NO

14289162

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Abstract

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An apparatus is disclosed for a memory cell having a floating body. A memory cell may include a transistor over an insulation layer, the transistor including a source, and a drain. The memory cell may also include a floating body including a first region positioned between the source and the drain, a second region positioned remote from each of the source and drain, and a passage extending through the insulation layer and coupling the first region to the second region. Additionally, the memory cell may include a bias gate at least partially surrounding the second region and configured for operably coupling to a bias voltage. Furthermore, the memory cell may include a plurality of dielectric layers, wherein each outer vertical surface of the second region has a dielectric layer of the plurality adjacent thereto.

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Patent Owner(s)

  • MICRON TECHNOLOGY, INC.

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nguyen, Mike N Portland, US 5 37
Tang, Sanh D Boise, US 280 4010

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