MEMORY SYSTEM AND MEMORY CONTROLLER
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United States of America Patent
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Issued Date -
Sep 18, 2014
app pub date -
Sep 6, 2013
filing date -
Mar 14, 2013
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
According to one embodiment, a memory system includes a plurality of nonvolatile semiconductor memories including a plurality of memory cell transistors for holding data, and holding position information indicating a position of a defective memory cell transistor incapable of normally holding data and a position of a substitute portion for the defective memory cell transistor.
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