Method and apparatus for cache line state update in sectored cache with line state tracker
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United States of America Patent
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May 10, 2016
Grant Date -
Sep 18, 2014
app pub date -
Mar 14, 2013
filing date -
Mar 14, 2013
priority date (Note) -
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Abstract
A processing device and method for cache control including tracking updates to the line state of a cache superline are described. In response to a request pertaining to a superline, a cache controller of the processing device can perform one or more read-modify-write (RMW) operations to (a) a line state vector of a line state array and (b) a counter of the line state array. Based on a determination that one or more requests to the superline have completed, the line state vector from the line state array can be written to a tag array. The cache controller can track pending line state updates to a superline outside of the tag array, and a line state update can occur in the cache controller, rather than awaiting completion of all outstanding operations on a superline. Updates to multiple line states can be maintained simultaneously, and up-to-date ECCs computed.
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