Controlling processor consumption using on-off keying having a maximum off time

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United States of America Patent

PATENT NO 9354694
APP PUB NO 20140281602A1
SERIAL NO

13827738

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Abstract

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In an embodiment, a processor includes a logic to cause at least one core to operate with a power control cycle including a plurality of on times and a plurality of off times according to an ON-OFF keying protocol, where the off times each correspond to a maximum off time for a platform including the processor. Other embodiments are described and claimed.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Keppel, David Pardo Seattle, US 9 95
Nasrullah, Jawad Palo Alto, US 23 249

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