Data transmission using delayed timing signals
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United States of America Patent
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Dec 12, 2017
Grant Date -
Oct 2, 2014
app pub date -
Oct 26, 2012
filing date -
Nov 1, 2011
priority date (Note) -
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Abstract
An integrated circuit includes a delay circuit and first and second interface circuits. The delay circuit delays a first timing signal by an internal delay to generate an internal timing signal. The first interface circuit communicates data to an external device in response to the internal timing signal. The second interface circuit transmits an external timing signal for capturing the data in the external device. An external delay is added to the external timing signal in the external device to generate a delayed external timing signal. The delay circuit sets the internal delay based on a comparison between the delayed external timing signal and a calibration signal transmitted by the first interface circuit.
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