MEMORY DEVICES AND METHODS FOR HIGH RANDOM TRANSACTION RATE
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Oct 2, 2014
app pub date -
Jan 14, 2014
filing date -
Jan 13, 2011
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A memory device can include a random access memory array configured to store data values; a plurality of bi-directional ports, configured to transfer data values into and out of the memory device on rising and falling transitions of at least one access clock signal; and at least one address bus configured to receive at least a portion of address values to random access locations on rising and falling transitions a timing clock signal having the same frequency as the access clock signal.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully