MULTI-CORE PROCESSOR AND CONTROL METHOD
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United States of America Patent
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Issued Date -
Oct 2, 2014
app pub date -
Mar 4, 2014
filing date -
Mar 27, 2013
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
According to an embodiment, a multi-core processor is capable of executing a plurality of tasks. The multi-core processor includes at least a first core and a second core. The first core and the second core are capable of accessing a shared memory area. The first core includes one or more memory layers in an access path to the shared memory area, the one or more memory layers including a local memory for the first core. The second core includes one or more memory layers in an access path to the shared memory area, the one or more memory layers including a local memory for the second core. The local memory for the first core and the local memory for the second core include memories with different unit cell configurations in at least one identical memory layer.
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