Identifying and tagging breakpoint instructions for facilitation of software debug
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United States of America Patent
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Oct 27, 2015
Grant Date -
Oct 2, 2014
app pub date -
Mar 26, 2013
filing date -
Mar 26, 2013
priority date (Note) -
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status (Latency Note)
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Abstract
A processor stores an address of a first instruction of a first instruction set into a first register. The processor determines that a first instruction set location of the first instruction address matches a breakpoint instruction set location of a breakpoint instruction address stored in a second register, wherein the second register includes a state bit. The processor retrieves the first instruction. The processor determines that a breakpoint instruction offset of the breakpoint instruction address identifies the first instruction as the breakpoint. The processor sets the state bit of the second register. The processor removes the first instruction based on the state bit being set and then re-retrieves the first instruction. The processor tags the first instruction and generates an interrupt based on either the tagged first instruction being next to completion or the tagged first instruction being completed.
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