Non-volatile semiconductor memory device
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United States of America Patent
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Apr 14, 2015
Grant Date -
Oct 9, 2014
app pub date -
Jun 19, 2014
filing date -
Jun 14, 2011
priority date (Note) -
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Abstract
In performing a read operation of a memory transistor, a control circuit supplies a first voltage to a selected word line connected to a selected memory transistor. A second voltage is supplied to a non-selected word line connected to a non-selected memory transistor other than the selected memory transistor, the second voltage being higher than the first voltage. A third voltage is supplied to a bit line. A fourth voltage lower than the third voltage is supplied to, among source lines, a selected source line connected to a memory string including the selected memory transistor in a selected memory block. A fifth voltage substantially the same as the third voltage is supplied to, among the source lines, a non-selected source line connected to a non-selected memory string in the selected memory block.
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