Circuit for reducing negative bias temperature instability

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United States of America Patent

PATENT NO 9419617
APP PUB NO 20140320169A1
SERIAL NO

14331711

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Abstract

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A circuit comprises a control circuit having an output node. The circuit also comprises a half latch keeper circuit coupled to the control circuit. The half latch keeper circuit is configured to control the output node during a standby mode. The circuit also comprises a transistor coupled to the output node. The control circuit is configured to turn off the transistor during the standby mode.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTDHSINCHU

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chern, Chan-Hong Palo Alto, US 206 1711
Hsueh, Fu-Lung Cranbury, US 147 2474
Huang, Ming-Chieh San Jose, US 116 892
Lin, Chih-Chang San Jose, US 138 720
Sheffield, Bryan Austin, US 13 34

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