Time-to-digital conversion with analog dithering

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United States of America Patent

PATENT NO 8963750
APP PUB NO 20140320324A1
SERIAL NO

14258102

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Abstract

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There is described a time-to-digital conversion scheme using an arrangement of delay elements based Time-to-Digital Converter, TDC (20), wherein dithering is built in the digital domain and introduced in the analog domain as a modulation of a supply voltage (TDC-supply) supplying delay elements of the TDC, each having a propagation delay which exhibits a dependency to their supply voltage.

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Patent Owner(s)

  • ASAHI KASEI MICRODEVICES CORPORATION

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Canard, David Colombelles, FR 16 61
Delorme, Julien Colombelles, FR 1 9

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