SUCCESSIVE-APPROXIMATION-REGISTER ANALOG-TO-DIGITAL CONVERTER FOR PROGRAMMABLY AMPLIFYING AMPLITUDE OF INPUT SIGNAL AND METHOD THEREOF
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United States of America Patent
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Oct 14, 2014
Grant Date -
Oct 30, 2014
app pub date -
Aug 8, 2013
filing date -
Apr 28, 2013
priority date (Note) -
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Abstract
Disclosed are a successive-approximation-register (SAR) analog-to-digital converter (ADC) for programmably amplifying an amplitude of an input signal and a method thereof. During a sampling phase, a bottom plate of at least one capacitor in a capacitor array is connected electrically to an input signal, so that the capacitor array samples and amplifies the input signal, so as to lower a required sampling capacitor or reduce noise generation.
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