PROVIDING A VOID-FREE FILLED INTERCONNECT STRUCTURE IN A LAYER OF A PACKAGE SUBSTRATE
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United States of America Patent
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May 13, 2013
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May 13, 2013
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Abstract
Embodiments of the present disclosure are directed towards techniques and configurations for providing void-free filled interconnect structures in a dielectric layer of a package assembly. In one embodiment, the method for providing a void-free filled interconnect structure may include forming a through hole through a layer of a package substrate, and depositing a conductive material to fill the through hole. Depositing the conductive material may be performed while gradually increasing a current density of the conductive material and correspondingly changing a flow rate of the conductive material. Other embodiments may be described and/or claimed.
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