Programmable logic device and semiconductor device
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United States of America Patent
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Oct 27, 2015
Grant Date -
Nov 20, 2014
app pub date -
May 13, 2014
filing date -
May 17, 2013
priority date (Note) -
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status (Latency Note)
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Abstract
A programmable logic device having low power consumption with operation speed maintained is provided. The programmable logic device includes a first circuit; a second circuit; a first transistor making electrical connection between the first circuit and the second circuit depending on a potential of a gate of the first transistor; a first switch configured to control supply of a signal to a first node; a second switch configured to control supply of the signal to a second node; a second transistor having a gate and one of a source and a drain that are electrically connected to the first node and having the other of the source and the drain that is electrically connected to the second node; and a capacitor that holds a potential of the signal supplied to the first node.
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