Semiconductor device

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8994430
APP PUB NO 20140340134A1
SERIAL NO

14276018

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ATTORNEY / AGENT: (SPONSORED)

Importance

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Abstract

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To reduce power consumption of a circuit (TEDC) which detects timing errors in a main flip-flop by determining whether or not output data signals of the main flip-flop and a shadow flip-flop correspond. The TEDC includes a power gating circuit (PGC) which performs power gating of the shadow FF and a reset circuit (RSTC) which resets an output signal of the shadow FF. The PGC makes the shadow FF in an active mode only when error detection needs to be performed; other than that, the PGC makes the shadow FF in a power saving mode. The RSTC supplies a certain voltage to an output terminal of the shadow FF in the power saving mode to suppress malfunction of the TEDC. A transistor using an oxide semiconductor is used to supply the voltage to the output terminal.

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Patent Owner(s)

  • SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Shionoiri, Yutaka Kanagawa, JP 199 5212

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