Magnetoresistive random-access memory
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United States of America Patent
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Feb 28, 2017
Grant Date -
Nov 20, 2014
app pub date -
Jun 14, 2013
filing date -
May 17, 2013
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Abstract
A memory cell comprises a dual-gate fin field effect transistor (FinFET) and first and second serially connected magnetic tunnel junction (MTJ) devices for improving reliability of memory operations. The FinFET represents an access transistor and includes a first gate and a second gate. The second gate is configured to be electrically independent from the first gate and to adjust threshold voltage of the FinFET. Each of the first and second MTJ devices represent a magnetic storage element and includes at least two ferromagnetic (FM) layers separated by a thin insulating layer forming a tunneling junction. Based on the relative magnetization of the two FM layers, each MTJ device has high and low resistance states. Higher reliability of memory write operation is primarily achieved with the help of FinFET and higher reliability of memory read operation is primarily achieved with increased read margin.
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